The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than those from the previous generation. However, those advances have increased the complexity of processing and manufacturing ICs and, for those advances to be realized, similar developments in IC processing and manufacturing are necessary. For example, an IC is formed by creating one or more devices (e.g., circuit components) on a substrate using a fabrication process. As the geometry of such devices is reduced to the submicron or deep submicron level, the IC's active device density (i.e., the number of devices per IC area) and functional density (i.e., the number of interconnected devices per IC area) have become limited by the fabrication process.
In one example, during the manufacturing processes, oxygen may enter into the metal-oxide high-k gate dielectric residing at the edge of a gate electrode, and diffuse laterally toward the center of the electrode creating an undesirable amorphous or sub-oxide formation in the interface of metal-oxide high-k gate dielectric and gate electrode. Such a formation adversely affects the performance of the device, such as the equivalent oxide thickness (EOT) in a device formed with a high-k dielectric layer (e.g., having a higher dielectric constant than 3.8; in another example, having a higher dielectric constant than 8.). For example, the oxidation layer may cause an increase of EOT and/or non-uniform EOT to degrade device driving current.
Previously available methods for eliminating such a sub-oxide formation include utilizing nitride seals or barriers, often in combination with an oxygen-nitrogen-oxygen (ONO) spacer. However, such approaches possess a number of shortcomings. For example, if a relatively thick (e.g., greater than 60 Å) nitride seal is formed before source/drain extension or lightly-doped drain (LDD) implant procedures and/or rapid thermal anneal (RTA), the implant and RTA procedures must be modified to accommodate the existence of the nitride seal. Also, an additional etching process may be required to remove the nitride film over the source and drain regions. If the nitride seal is formed after implant and RTA, sub-oxide formation may occur during RTA process before the seal is formed.
Accordingly, it is desirable to provide an improved system and method for suppressing oxidation during the manufacturing of semiconductor devices.